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FPGA

FPGA — Team Lead

Applications open

Lead a five-person technical team responsible for developing part of QTE's FPGA trading system. You will coordinate three FPGA Engineers and one Software Engineer, contribute directly to technical development, and make sure the team remains organised, integrated and on schedule. This is a hands-on student leadership role rather than a purely managerial position.

What you'll do

Arm: FPGA · Places: 1 per team · Team size: 5

About QTE

Queen's Tower Exchange is a financial-markets simulation for Imperial College London students. The FPGA Trading Project develops low-latency electronic trading systems across three teams: Exchange, Market Making and Market Taking.

The FPGA Trading Project consists of three teams — Exchange, Market Making and Market Taking — with five students in each team. Each team will have 1 Team Lead, 3 FPGA Engineers and 1 Software Engineer.

Applicants will be placed into teams based on their interests, technical strengths and where they are likely to contribute most effectively. Previous quantitative-finance or trading experience is not required. Applications are open to students from all disciplines, excluding first-year undergraduates.

Responsibilities

  • Lead the technical direction and day-to-day coordination of your team.
  • Help define the architecture of the team's FPGA and software systems.
  • Allocate technical tasks and ensure work is progressing against agreed milestones.
  • Contribute directly to FPGA development and technical problem-solving.
  • Coordinate integration between FPGA and software components.
  • Communicate requirements, progress and technical blockers clearly within the team.
  • Work with the other FPGA teams to keep interfaces and system behaviour consistent.
  • Review designs, support team members and help resolve technical issues.
  • Ensure the team remains collaborative, reliable and committed throughout the project.

What success looks like

A well-coordinated team that delivers a reliable, integrated and technically sound subsystem. The team should communicate effectively, meet agreed milestones, resolve problems quickly and produce work that integrates cleanly with the wider FPGA trading system.

Prerequisite knowledge

  • Completion of an industrial internship or UROP/research project in a relevant technical area, such as FPGAs, GPUs, CPUs, computer architecture, embedded systems or high-performance computing.
  • Confidence using SystemVerilog/Verilog, C++ and Python.
  • Strong communication skills and the ability to lead a technical team.
  • Evidence of effective teamwork and responsibility in a substantial technical project.
  • Strong problem-solving skills and the ability to learn unfamiliar concepts quickly.
  • A genuine interest in quantitative finance, electronic trading and financial markets.
  • Ability to commit consistently to the project.

Previous quantitative-finance or trading internship experience is not required.

Useful, but not required

Experience with low-latency systems, digital design, computer architecture, networking, financial market data, order books or quantitative trading projects.

What you'll be taught

Much of your learning will take place through project training, technical guidance and hands-on development before and during implementation.

  • How QTE's Exchange, Market Making and Market Taking systems interact.
  • How electronic order books, market data and order execution work.
  • How quantitative trading logic can be translated into low-latency FPGA architectures.
  • How to make hardware/software partitioning and system-architecture decisions.
  • How to coordinate integration and testing across multiple technical teams.